Admissions
Madanapalle Institute of Technology & Science is now MITS Deemed to be University.
Dr. V. Jayaprakasan

Qualification : Ph.D. (JNTUA, Ananthapuramu)

Designation : Assoc. Professor

Email: [email protected]

Details of Educational Qualification:

Course Specialization Group College Name/University Year of Passing
Ph.D. ECE ECE JNTUA, Ananthapuramu 2016
M.E. Communication Systems ECE B. S. Abdur Rahman Crescent Engineering College, Anna University 2006
B.E. ECE ECE National Institute of Technology, Bharadhidasan University 1999

 

List of Publications

S.No Title of the Paper Full Details of Journal Name / Conference Name, Volume number, page number, Date
1 “A hybrid strategy for mitigating unbalance and improving voltage considering higher penetration of electric vehicles and distributed generation” Sustainable Cities and Society 103489, Elsevier, Vol. 76, pp 1-16, 2021 (SCI Indexed) https://doi.org/10.1016/j.scs.2021.103489
2 “Mitigation of Phase Noise and BER by different CE in the MIMO-OFDM System” Lecture Notes in Electrical Engineering, Springer Nature Singapore Pvt. Ltd. Vol. 700, pp. 3143-3158, ISSN: 1876-1100 2020 (Scopus Indexed, Web of Science) https://doi.org/10.1007/978-981-15-8221-9_293
3 “FPGA Realization of Multi-stage Decimator for WN Applications” Lecture Notes in Electrical Engineering, Springer Nature Singapore Pvt. Ltd. Vol. 700, pp. 2335-2348, ISSN: 1876-1100 2020 (Scopus Indexed, Web of Science) https://doi.org/10.1007/978-981-15-8221-9_218
4 “Aerial Combat Drone” High Technology Letters, Volume 26, Issue 6, 2020 ISSN No: 1006-6748 (Scopus Indexed)
5 “Semantic Segmentation of Brain Tumor from MRI Images and SVM Classification using GLCM Features” The Internationaljournal of analytical and experimental modal analysis, Volume XIII, Issue VI, pp 1115- 1130, ISSN NO:0886-9367, June 2021.
6 “Design of CIC based Decimation Filter Structure using FPGA for WiMAX Applications”, IEICE Electronics Express, Vol.17 No.6, 2019. (SCI Indexed)
7 “Exhaustive Approach for Multistage Filter Design to Minimize Complexity of FIR Filter for WCDMA Applications,” International Journal of Recent Technology and Engineering (IJRTE) ISSN: 2277-3878, Volume-7, Issue-6, March 2019 (Scopus Indexed)
8 “A Compact Planar Inverted F Antenna for RF Energy Harvesting,” Journal of Advanced Research in Dynamical & Control Systems (JARDCS), Vol. 11, 01-Special Issue, 2019 (Scopus Indexed)
9 “ Performance Analysis of Ultra Low Power and PDP Efficient 1- Bit Full Adder Circuit for Arithmetic Blocks,” International Scientific Journal of Contemporary Research in Engineering Science and Management (ISJCRESM), ISSN: 2456- 1134 Volume-3, Issue-4, February 2019 (Google Scholar)
10 “Comparative Analysis of Interpolation/Decimation FIR Filter Structures for WLAN-b and WLAN-g Applications,” International Journal for Innovative Research in Science & Technology, Volume 2, Issue 12, ISSN (online): 2349-6010, May 2016.
11 “Performance Analysis of Different Decimation Filter Structure Realizations using Multistage Approach for GSM Applications,” International Journal of Applied Engineering Research, Special Issue,Volume 10, No.09 (2015), April 2015 (Scopus Indexed)
12 “FPGA Implementation of FIR basedDecimation Filter Structure for WiMAX Application,” International Journal of AdvancedResearch in Computer and Communication Engineering, Volume 2, Issue 7, July 2013.
13 “Implementation and Comparison of Different CIC Filter Structure for Decimation,” ICTACT Journal on Communication Technology, Volume04, Issue: 02, June 2013.
14 “Implementation of Efficient Audit Service Outsourcing for Data Integrity by Interfacing the Mobile Device in Clouds,” International Journal of Computer Applications (0975-8887), Volume 67 – No.20, April 2013.
15 “Design and Implementation of Efficient CIC Filter Structure for Decimation,” International Journal of Computer Applications (0975-8887), Volume 65 No.14, March 2013.
16 “Spectrum Sensing and Security in Cognitive Radio,” International Journal of Computer Applications (0975-8887), Volume 66–No.23, March 2013.
17 “Power Optimization Technique for Sensor Network,” International Journal of Computer Applications Technology and Research, Volume 2– Issue 3, 255–260, 2013.
18 “Improvisation of MAC Protocol for WirelessSensor Network,” International Journal of Electronics and Communication andComputer Engineering, Volume 4, Issue 3, ISSN (Online): 2249-071X, ISSN (Print):2278-4209, 2013.
19 “Performance Analysis for Parallel MRA in Heterogeneous Wireless Networks,” International Journal of ComputerApplications Technology andResearch, Volume 2–Issue 3, 329–334, 2013.
20 “Efficient way of Communication using Fuzzy Theory,” Journal of Science and Engineering, Volume 2 (1), 2013, 31-38.
21 “Design of Efficient Polyphase Multistage FIR Filter with Memory Saving Structure for Decimation,” European Journal of Scientific Research, Vol. 93 No 2 December, 2012, pp.289-300 (Scopus Indexed).
22 “Design and Analysis of Low Poser, Area Efficient Skip Logic for CSKA Circuit in Arithmetic Unit,” IEEE International Conference on Emerging Devices and Smart Systems (IEEE–ICEDSS’2018), March 2nd and 3rd 2018, Namakkal, Tamilnadu, India.
23 “Performance Analysis of Different Decimation Filter Structure Realizations using Multistage Approach for GSM Applications,” International Conference on Engineering Technology and Science, (ICETS’15), March 5th and 6th, 2015, Rasipuram, Tamilnadu, India.
24 “Design of Efficient Decimation Filter Structure for WiMAX Applications with Memory Saving Approach,” IEEE Int. Symposium on Signal Processing and Information Technology, (IEEE-ISSPIT’2014), December 15-17, 2014, Noida.
25 “Implementation of Two Stage FIR Decimation Filter Structure,” 2nd International Conference on Communications and Signal Processing (ICCSP’2013), 1st – 3rd April, 2013, Ongole, India, pp. 99-10. (Achieved Best Paper Award)
26 “Cascading Sharpened CIC and Polyphase FIR Filter for Decimation Filter,” 2nd International Conference on Advances in Electrical and Electronics Engineering (ICAEEE’2013), March 17–18, 2013, Dubai (UAE), pp.148-154.
27 “Evaluation of the Conventional Vs. Ancient Computation methodology for Energy Efficient Arithmetic Architecture,” IEEE International Conference on Process Automation, Control and Computing (IEEE-PACC’2011), July 20–22, 2011, Coimbatore,India.