Dr. G. Reddy Hemantha

Qualification : Ph.D. (JNTUA, Anantapuramum)

 

Details of Educational Qualification:

Course Specialization Group College Name/University Year of Passing
Ph.D. Digital Electronics & VLSI Design Electronics and Communication Engineering JNTUA, Anantapuramum 2021
M.Tech. Digital Electronics and Communication Systems Electronics and Communication Engineering Madanapalle Institute of Technology & Science, JNTUA, Anantapuramum 2010
AMIE Electronics and Communication Engineering Electronics and Communication Engineering Institution Of Engineers India, IEI 2008
DECE Electronics and Communication Engineering Electronics and Communication Engineering State Board of Technical Education and Training, Hyderabad 1993

List of Publications

S.No Title of the Paper Full Details of Journal Name / Conference Name, Volume number, page number, Date
1 Low Latency Prefix Accumulation Driven Compound MAC Unit for Efficient FIR Filter Implementation Journal of Scientific & Industrial Research Vol. 79, pp. 135–138, February 2020. Cited -2, SCI indexed.
2 Performance Analyzes of RNS FIR Filter using Prefix Accumulation Based DA Arithmetic JOURNAL OF CRITICAL REVIEWS, ISSN- 2394-5125, VOL 7, ISSUE 10, 2020, Scopus Indexed.
3 High Performance Rns-Fir Filter Using Prefix Accumulation Based Da Arithmetic For Ecg Signal Classification International Journal Of Scientific & Technology Research, ISSN 2277-8616, VOLUME 9, ISSUE 03, MARCH 2020, Scopus Indexed.
4 An Efficient FIR Filter Design using DA based Speculative Residue and Reverse Computation RNS system International Journal of Emerging Trends in Engineering Research, ISSN 2347 – 3983, VOLUME 8, ISSUE 10, October 2020, Scopus Indexed.
5 FPGA Implementation of Speculative Prefix Accumulation-Driven RNS for High-Performance FIR Filter organised by Guru Nanak Institute of Technology published in Lecture Notes in Networks and Systems, Springer, Singapore., 2018. Cited:1
6 Low Area Exact Speculative Carry Look Ahead Adder using MGDI Technique International Journal of Engineering and Advanced Technology (IJEAT) ISSN: 2249 – 8958, Volume-8 Issue-6, August 2019. Scopus Indexed.
7 DA Based Systematic Approach Using Speculative Addition for High Speed DSP Applications International Journal of Engineering & Technology 7 (2), 197-199, 2018. Scopus Indexed.
8 Low Area and Low Power Consumption 32bit CSKA Implemented by Verilog HDL ISSN: 2320-2882, 2018 IJCRT, Volume 6, Issue 2, April 2018.
9 “ARM7 Based Globalized Electronic Voting Machine” IJATIR, Vol 7, Issue 15, October 2015.
10 “Navigation For The Blind Using GPS Along With Portable Camera Based Real Time Monitoring” SSRG-IJECE, Vol 1, Issue 8, October 2014. Cited: 7
11 “Contrast Enhancement Using Dominant Brightness Level Analysis Adaptive Intensity Transform”, IJCSMC, Vol 2, Issue 11, November 2013.
12 “Audio Steganography by LSB Substitution Using Different polynomial Equations” IJAST, Vol 4, Issue 6, 2012. International Conferences:
13 DESIGN OF BRAUN MULTIPLIER U SING PASS TRANSISTOR LOGIC, Aditya College of Engineering, Madanapalle, ICFCIoT,2019.
14 DESIGN OF 8T SRAM CELL FOR DYNAMIC FEEDBACK CONTROL SIGNAL USING FINGERING METHOD, Aditya College of Engineering, Madanapalle, ICFCIoT,2019.
15 FPGA Implementation of Speculative Prefix Accumulation-Driven RNS for High- Performance FIR Filter, Guru Nanak Institute of Technology, Lecture Notes in Networks and Systems, Springer, Singapore, 2018.
16 DA Based Systematic Approach Using Speculative Addition for High Speed DSP Applications, SRM Institute of Science and Technology, International Conference on Recent Trends in Computing, Delhi-NCR Campus, Ghaziabad, Uttar Pradesh, 2017.
17 “Hiding data in images by LSB substitution using double polynomial”, NCRTC’10 on Emerging trends in electronics and communication engineering, SJBIT, Bangalore, 8 May 2010.