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Dr. Nilesh Anand Srivastava

Qualification : Ph.D.

Details of Educational Qualification:

Course Specialization Group College Name/University Year of Passing
Ph.D. Microelectronics & VLSI Design Electronics and Communication Engineering Motilal Nehru National Institute of Technology, Allahabad 2020
M.Tech. Digital Systems Electronics and Communication Engineering Madan Mohan Malaviya University of Technology, Gorakhpur 2017
B.Tech. Electronics Engineering Electronics Engineering Uttar Pradesh Technical University, Lucknow 2012

My Publications

S.No Title of the Paper Full Details of Journal Name / Conference Name, Volume number, page number, Date
1 Design and Analysis of Nano-scaled SOI-MOSFET based Ring Oscillator Circuit for High Density ICs, Applied Physics A: Materials Science & Processing 125(8) (2019) 533. DOI: 10.1007/s00339-019-2828-x ISSN: 0947-8396 (SCI-indexed) Impact Factor: 1.784
2 Linearity Distortion Assessment and Small-Signal Behavior of NanoScaled SOI MOSFET for Terahertz Applications, ECS Journal of Solid State Science and Technology 8(12) (2019) N234N244. DOI: https://doi.org/10.1149/2.0201912jss ISSN: 2162-8769 (SCI-indexed) Impact Factor: 1.795
3 Analog and radiofrequency performance of nanoscaled SOI MOSFET for RFIC based communication systems, Microelctronics Journal, 98, (2020) 104731. DOI: https://doi.org/10.1016/j.mejo.2020.104731 ISSN: 0026-2692 (SCI-indexed) Impact Factor: 1.284
4 Design of High Speed and Low-power Ring Oscillator Circuit in Recessed Source/Drain SOI Technology, ECS journal of Solid State Science & Technology 8(3) (2019) N47-N54. DOI: 10.1149/2.0061903jss ISSN: 2162-8769 (SCI-indexed) Impact Factor: 1.795
5 A Compact Analytical Drain Current Model of Fully Depleted SOI MOSFETs with Lightly Doped N- underneath the N+ Source Region, Silicon (2020). DOI: https://doi.org/10.1007/s12633-020-00525-y ISSN: 1876-9918 (SCI-indexed) Impact Factor: 1.21
6 Perspective of buried oxide thickness variation on Triple Metal-Gate (TMG) Recessed-S/D FD-SOI MOSFET, Advances in Electrical and Electronic Engineering 16(3) (2018) 380387. DOI: 10.15598/aeee.v16i3.2797 ISSN: 1336-1376 (ESCI/Scopus Indexed)
7 Design and Analysis of nano-scaled Recessed-S/D SOI MOSFET based Pseudo-NMOS Inverter for Low-power Electronics, Journal of Nanotechnology 2019 (4935073) (2019) 112. DOI: 10.1155/2019/4935073 ISSN: 1687-9503 (Scopus Indexed)
8 Impact of Front and Back Oxide Thickness Variation on Performance of Modified Source FD SOI MOSFET, Journal on Embedded Systems 5(2) (2016) 13-19. DOI: https://doi.org/10.26634/jes.5.2.11385 ISSN: 2320-2335 (UGC approved)
9 Theoretical Investigation of Dielectric-Modulated Nanoscaled FD SOI MOSFET for Low Power ICs: Impact of Interface Trap Charges on Device Reliability, IEEE Transactions on Device and Materials Reliability. (Under Review) International Conferences
10 Performance evaluation of Hetero-Gate-Dielectric Re-S/D SOI MOSFET for low Power Applications, 6th IEEE Uttar Pradesh Section International Conference (UPCON 2019), November 8-10, 2019, Aligarh. DOI: 10.1109/UPCON47278.2019.8980132 (IEEE Xplore: Scopus Indexed)
11 Impact of doping concentration on the performance of TMG Re-S/D FDSOI MOSFET, 5th IEEE Uttar Pradesh Section International Conference (UPCON 2018), November 2-4, 2018, Gorakhpur. DOI: 10.1109/UPCON.2018.8596870 (IEEE Xplore: Scopus Indexed)
12 Linearity Enhancement of CMOS OTA for High Performance Applications, 2018 5th IEEE Uttar Pradesh Section International Conference (UPCON 2018), November 2-4, 2018, Gorakhpur. DOI: 10.1109/UPCON.2018.8596855 (IEEE Xplore: Scopus Indexed)
13 Performance Investigation of Gate-Engineered RecessedS/D FDSOI MOSFETs for Low Power Analog/RF Applications, 15th IEEE India Council International Conference (INDICON 2018), December 16-18, 2018, Coimbatore. DOI: 10.1109/INDICON45594.2018.8987016 (IEEE Xplore: Scopus Indexed)
14 Analytical modelling of surface potential of modified source FD-SOI MOSFET, IEEE International conference on emerging trends in communication technologies (ETCT), November 18-19, 2016. DOI: 10.1109/ETCT.2016.7882990 (IEEE Xplore)
  • Nilesh Anand Srivastava, Anjali Priya and Ram Awadh Mishra, Analog and Radio-frequency Performance of HeteroGate-Dielectric FD SOI MOSFET in Re-S/D Technology, Lecture Notes in Electrical Engineering, Advances in VLSI, Communication and Signal Processing, Springer, 2020 ISBN: 978-981-15-6839-8 (Scopus Indexed)
  • G. Manikanta, Ram Awadh Mishra, Nilesh Anand Srivastava and Ritesh Kumar Jaiswal, Design and Analysis of SelfBiased OTA for Low-Power Applications, Lecture Notes in Electrical Engineering, Advances in VLSI, Communication and Signal Processing, Springer, vol. 587, 2019. DOI: https://doi.org/10.1007/978-981-32-9775-3_57 ISBN: 978-981-329-7746 (Scopus Indexed)